The present invention relates to a method for implanting ions into a surface of a semiconductor structure covered by a layer of insulating material such as silicon oxide.
In UMOS power devices a gate electrode is buried in a trench formed in a semiconductor structure through which current is to be controlled which flows in the vertical direction through the structure adjacent the trench. The gate electrode only partially fills the trench, and walls of the trench above the gate electrode define source regions. The introduction of source dopant to form these regions presents various problems.
In one known UMOS device, a trench is formed in a semiconductor structure so that the trench extends through a P region into an underlying N region. The walls of the trench are then coated with an oxide insulating layer and the trenches are then partially filled with polysilicon to form the gate electrodes. The oxide layer on the trench walls is stripped back to the level of the top of the gate electrode. The upper surface of the structure from which the trenches extend is masked with a layer of oxide which extends towards but stops short of the trench edges. Thus the trench walls above the gate electrode and the surface of the structure immediately adjacent the trenches is exposed. Source dopant is introduced into the exposed surfaces. The source dopant is carried by a gas which coats the exposed surfaces and, to some extent, also delivers dopant to the upper surface of the polysilicon gate.
Gaseous dopant delivery is not easy to use when manufacturing devices which incorporate both power and signal processing components. Such devices therefore are manufactured using an implanted source dopant. One method of source dopant implantation is described in published international patent specification WO 97/00536. This shows the introduction of dopant ions into exposed trench wall surfaces above a polysilicon gate using an ion source producing an ion beam which is inclined to the trench wall surfaces so that ions can be directly implanted into those surfaces. It is noted that large angle implanters are not industry standard and if used will incur added expense. In addition, given that implantation is directly into the exposed silicon surface forming the trench walls, it is necessary to strip away the oxide layer above the polysilicon gate. Stripping the gate oxide from the side walls also etches down into the gate oxide between the polysilicon gate and the silicon structure. The resultant space between the gate and adjacent silicon then needs to be filled with high quality oxide capable of resisting the very intense electric fields generated between the gate polysilicon and the source diffusion. It would be desirable if it was not necessary to strip the trench walls above the polysilicon gate before implantation.
A method of semiconductor device fabrication is described in published international patent specification WO 99/25016 in which large angled implantation is used, implantation being effected through an oxide layer which remains in-situ on the trench walls. This avoids the problems associated with stripping back the oxide layer above the polysilicon gate but does require the use of large angled implantation equipment and therefore associated additional costs.
It is in an object of the present invention to obviate or mitigate the problems outlined above.
According to the present invention, there is provided a method for implanting ions into a surface of a semiconductor structure covered by a layer of insulating material, wherein a beam of ions is directed at a glancing angle to the layer of insulating material such that a substantial proportion of ions which are implanted into the semiconductor structure surface are scattered from the beam by the layer of insulating material.
The beam of ions is preferably directed at a glancing angle to the layer of insulating material.
The term xe2x80x9cglancing anglexe2x80x9d is used in the present application to indicate a beam angle relative to the surface of the insulating layer which is such that the depth of penetration of ions from the beam through the insulating layer in the direction of the beam is such that an ion which is not scattered by the insulating layer will remain within the insulating layer. Glancing angles will typically be in the range 0 to 10xc2x0. Implantation equipment is usually set at 7xc2x0 from the vertical to avoid channelling effects and therefore standard implantation equipment can be used in accordance with the present invention.
The insulating material may be a layer of oxide, and the invention has particular utility when the surface into which ions are to be implanted is defined by a wall of a trench formed in the semiconductor structure. Preferably, before ion implantation, the trench is partially filled with conductive material electrically insulated from the semiconductor structure. The electrical insulation of the conductive material may be achieved by forming a layer of oxide on the trench walls. That layer of oxide may be removed and replaced by a further layer of oxide, or simply left in-situ, or thinned to provide optimum ion implantation conditions.
Implanted ions may be driven into the semiconductor structure by thermal processing after initial implantation. Some ions implanted into the insulating layer may thus migrate into the underlying structure.